The present invention relates to an operational amplifier arrangement as is described in the preamble of claim 1.
Such an operational amplifier arrangement is already known in the art, e.g. from the article "MOS Operational Amplifier Design--A Tutorial Overview", written by Paul R. Gray, and Robert G. Meyer, IEEE Journal of Solid-State Circuits, Vol. SC-17, Nr 6, December 1982, pp 969-982. Therein, on p 971, a schematic of a basic two-stage CMOS operational amplifier is depicted in FIG. 4. This figure corresponds to the configuration described in the non-characteristic part of claim 1. Indeed, the differential input pair formed by transistors M1 and M2, having as resistive loads respective transistors M3 and M4, together with the bias stage consisting of transistors M5 and M8 as well as the current source Ibias, constitute the first operational amplifier of the non-characteristic part of claim 1, whereas the inverter output stage formed by transistors M6 and M7 constitutes the second operational amplifier of the non-characteristic part of claim 1. The DC reference voltage of the second operational amplifier referred to in the non-characteristic part of claim 1 is equal to the DC voltage required on the gate of the transistor M6, in order to sink the DC current delivered by transistor M7 for a drain-source voltage equal to half the value of the dynamic range of the input stage, for the cited prior art. The capacitor in the referenced prior art figure corresponds to the compensation capacitor as described in the non-characteristic part of claim 1, coupled between the output of the arrangement and the output of the first operational amplifier stage.
Such an operational amplifier arrangement has the advantage of having a low output impedance and a high drive capability, dependent on the specific circuitry used for realising both amplifiers. Yet this arrangement suffers from offset problems, since an offset due to for instance mismatch in the differential input pair of the first operational amplifier, will appear at the output of this arrangement multiplied with the total gain of the arrangement. This is intolerable when this arrangement is used for performing precision measurements of very small input signals.